EP1C3T144C8N General Purpose Relays Ic Fpga 104 I/O 144tqfp
Product Details:
Place of Origin: | original |
Brand Name: | original |
Certification: | original |
Model Number: | EP1C3T144C8N |
Payment & Shipping Terms:
Minimum Order Quantity: | 1 |
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Price: | negotiation |
Packaging Details: | carton box |
Delivery Time: | 1-3working days |
Payment Terms: | T/T, L/C |
Supply Ability: | 100,000 |
Detail Information |
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Series: | Cyclone® | Package: | Tray |
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Product Status: | Obsolete | Digi-Key Programmable: | Not Verified |
Number Of LABs/CLBs: | 291 | Number Of Logic Elements/Cells: | 2910 |
Total RAM Bits: | 59904 | Number Of I/O: | 104 |
Product Description
EP1C3T144C8N General Purpose Relays Ic Fpga 104 I/O 144tqfp
Cyclone® Field Programmable Gate Array (FPGA) IC 104 59904 2910 144-LQFP
Specifications of EP1C3T144C8N
TYPE | DESCRIPTION |
Category | Integrated Circuits (ICs) |
Embedded | |
FPGAs (Field Programmable Gate Array) | |
Mfr | Intel |
Series | Cyclone® |
Package | Tray |
Product Status | Obsolete |
Digi-Key Programmable | Not Verified |
Number of LABs/CLBs | 291 |
Number of Logic Elements/Cells | 2910 |
Total RAM Bits | 59904 |
Number of I/O | 104 |
Voltage - Supply | 1.425V ~ 1.575V |
Mounting Type | Surface Mount |
Operating Temperature | 0°C ~ 85°C (TJ) |
Package / Case | 144-LQFP |
Supplier Device Package | 144-TQFP (20x20) |
Base Product Number | EP1C3 |
Features of EP1C3T144C8N
■ 2,910 to 20,060 LEs, see Table 1–1
■ Up to 294,912 RAM bits (36,864 bytes)
■ Supports configuration through low-cost serial configuration device
■ Support for LVTTL, LVCMOS, SSTL-2, and SSTL-3 I/O standards
■ Support for 66- and 33-MHz, 64- and 32-bit PCI standard
■ High-speed (640 Mbps) LVDS I/O support
■ Low-speed (311 Mbps) LVDS I/O support
■ 311-Mbps RSDS I/O support
■ Up to two PLLs per device provide clock multiplication and phase shifting
■ Up to eight global clock lines with six clock resources available per logic array block (LAB) row
■ Support for external memory, including DDR SDRAM (133 MHz), FCRAM, and single data rate (SDR) SDRAM
■ Support for multiple intellectual property (IP) cores, including Altera® MegaCore® functions and Altera Megafunctions Partners Program (AMPPSM) megafunctions.
Structure of EP1C3T144C8N
■ Differential and single-ended I/O standards
■ 3.3-V, 64- and 32-bit, 66- and 33-MHz PCI compliance
■ Joint Test Action Group (JTAG) boundary-scan test (BST) support
■ Output drive strength control
■ Weak pull-up resistors during configuration
■ Slew-rate control
■ Tri-state buffers
■ Bus-hold circuitry
■ Programmable pull-up resistors in user mode
■ Programmable input and output delays
■ Open-drain outputs
■ DQ and DQS I/O pins
Environmental & Export Classifications of EP1C3T144C8N
ATTRIBUTE | DESCRIPTION |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
ECCN | 3A991D |
HTSUS | 8542.39.0001 |

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